ECE Research Seminar - Optimisation and Simulation of RC Time Constants in Snubber Circuits

Semiconductor devices are subjected to a high level of stress when used at high voltage and high current applications.  This stress is mainly due to hard switching and is it directly proportional to the switching frequency. This paper will describe methods used to remove this energy in order to prevent expensive switch damage due to overheating and high dv/dt oscillations. There are other losses to consider due to manufacturing down time and cost of equipment replacement. It is therefore necessary to ensure that the design of converters, power supplies etc, components are selected with optimum characteristics to ensure switching devices function within their Safe Operating Area (SOA). 

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